Silicon Valley Polytechnic Institute


Digital CMOS IC Design

This course provides a detailed review of the principles, concepts, and design methods used in the design of basic digital circuits using CMOS technology. The course will begin with a brief review of background information (i.e. fabrication technology, CMOS device physics, and related device equations), and then proceed to common digital building blocks and more complex digital circuits. Computer simulations are be used extensively to enhance the learning experience.


Course Duration

Duration of this course is 12 weeks with classes being held 2 sessions per week. In some cases 2 sessions are combined into one for convenience of students. Training duration per week consists of about 4-6 hours of instructor based training combined by about 6-4 hours of self practice for a total of about 10 hours per week. Tuition Fee for the course includes:

  • 12 weeks of instructor based class room and hands-on training
  • Extensive class notes
  • Certification

Course Schedule

Please check the CalPT calendar for schedule or contact CalPT at To register please call CalPT or send request to