Silicon Valley Polytechnic Institute
SVPTI

SVPTI

IC Layout Design Verification

This is one the best IC Layout training programs in the industry. It is part 2 of a 2-course series that covers semiconductor process technologies from 23nm CMOS to 0.35um BCD and explores Analog, Mixed-Signal and RF layout skills. Instructors are seasoned engineers with deep understanding of physical design, class assignments and practice examples are realistic and are taken from actual design projects. Duration of this training program is 12 weeks.

 

Course Duration

Duration of this course is 12 weeks with classes being held 2 sessions per week. In some cases 2 sessions are combined into one for convenience of students. Training duration per week consists of about 4-6 hours of instructor based training combined by about 6-4 hours of self practice for a total of about 10 hours per week. Tuition Fee for the course includes:

  • 12 weeks of instructor based class room and hands-on training
  • Extensive class notes
  • Certification

Course Schedule & Registration

New classes are starting monthly. For further information please contact SVPTI by email: info@SVPTI.com or Tel: 408-436-3000. To register call SVPTI or click on the following button:

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