CalPT

CalPT

IC Layout Design

One of the best training courses available in industry, this course introduces the students to the process, tools and methodology of IC Layout Design using the latest Design Automation tools. The course provides the students with the insight into the exciting field of semiconductor technology and electronic devices, and trains them in IC layout techniques for a variety of application in Digital, Analog, and RFIC. This training program prepares students for entry-level positions in the industry.

 

Course Duration

Duration of this course is 12 weeks with classes being held 2 sessions per week. In some cases 2 sessions are combined into one for convenience of students. Training duration per week consists of about 4-6 hours of instructor based training combined by about 6-4 hours of self practice for a total of about 10 hours per week. Tuition Fee for the course includes:

  • 12 weeks of instructor based class room and hands-on training
  • Extensive class notes
  • Certification

Course Schedule

Please check the CalPT calendar for schedule or contact CalPT at info@CalPT.com. To register please call CalPT or send request to info@CalPT.com.